Hi All,
Wondering if anyone out there has a basic schematic of a cap dump circuit using a comparator. Similar John's YouTube video:
http://www.youtube.com/watch?v=TRLVh...e_gdata_player
I am currently building the cap dump circuit that is provided in the Bedini SG Intermediate Book. Using a 555 timer circuit, opto coupler, and power FET's. I have the timing circuit working well in Multisim and have finally fully analyzed the discharge section of the circuit. Just need to figure out the best cap values to use.
If anyone out there has any tips that would be awesome.
Cheers,
J.
Wondering if anyone out there has a basic schematic of a cap dump circuit using a comparator. Similar John's YouTube video:
http://www.youtube.com/watch?v=TRLVh...e_gdata_player
I am currently building the cap dump circuit that is provided in the Bedini SG Intermediate Book. Using a 555 timer circuit, opto coupler, and power FET's. I have the timing circuit working well in Multisim and have finally fully analyzed the discharge section of the circuit. Just need to figure out the best cap values to use.
If anyone out there has any tips that would be awesome.
Cheers,
J.
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